Cassia.ai’s patented approach to fundamental computer arithmetic reduces the size of multiply-accumulate (MAC) and exponentiation circuits by more than 10x.
Many ML models accelerated with Cassia.ai technology suffer little to no loss in accuracy.
Our technology utilizes a fundamental change in architecture to realize lower power with higher performance. A true game changer from the edge to the cloud.

CEO/CTO/Founder with 10+ chip tape-outs. Developed Cassia.ai computer arithmetic algorithms. Multiple patents in IC design and ML.

Principal Hardware Engineer with 15 years experience optimizing RTL and front-end design on FPGA and ASIC design.

Principal Verification Engineer with over 18 years experience in module-level & full-chip verification.

Vice President of Products with over 30 years experience in product marketing and enginereing.